The FPGA Power Brick LV is an integrated fully scalable Machine and Motion Controller combining the brains of the cutting edge Power PMAC processor, the unsurpassed custom-designed Digital Signal Processor Gate3 and the low voltage brawns of the latest high performance MOSFET-based drives technology into one compact 4 or 8-axis servo package drive.
The PowerBrick LV-IMS-FPGA incorporates an FPGA based Encoder co-processor. It adds a programmable module between the back-panel connectors of a standard LV-IMS and the internal PowerBrick, intercepting the encoder data in real time.
A Zynq Ultrascale+ MPSoC has been used to achieve multi-channel encoder processing for applications such as synchronizing data acquisitions with motion systems during continuous experiment scans. Individual or combinations of encoders can be used to generate multiple output triggers, and encoder position capture (of all types of encoders) can be based on those triggers.
The Zynq Ultrascale+ MPSoC has two sections, a large FPGA connected to the encode hardware, and a dual- or quad-core ARM A53 running Linux. Data can be passed between the two and to/from the Ethernet port. The FPGA is entirely user-programmable. Open-source examples will be supplied, or users with suitable FPGA programming knowledge are free to customize all sections of the co-processor as required.
Additional axes are available via MACRO (high speed fibre optic network) and/or EtherCat for a possible total of 104 (8 + 32 MACRO + 64 EtherCat) axes of centralised and coordinated motion control.